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    首页产品索引TPS51200

    TPS51200

    购买收藏
    具有适用于 DDR2、DDR3、DDR3L 和 DDR4 的 VTTREF 缓冲基准的 3A 灌/拉 DDR 终端稳压器

    制造商:TI

    产品信息

    描述The TPS51200 device is a sink and source double data rate (DDR)termination regulator specifically designed for low input voltage, low-cost, low-noise systemswhere space is a key consideration.The TPS51200 maintains a fast transient response and requires aminimum output capacitance of only 20 µF. The TPS51200 supports a remotesensing function and all power requirements for DDR, DDR2, DDR3, DDR3L,Low-Power DDR3 and DDR4 VTT bus termination. In addition, the TPS51200 provides an open-drain PGOOD signal tomonitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspendto RAM) for DDR applications.Theis available in the thermally efficient 10-pin VSONthermal pad package, and is rated both Green and Pb-free. It is specified from –40°C to+85°C.特性 Input Voltage: Supports 2.5-V Rail and 3.3-V Rail VLDOIN Voltage Range: 1.1 V to 3.5 VSink and Source Termination Regulator Includes Droop CompensationRequires Minimum Output Capacitance of 20-µF (Typically 3 × 10-µF MLCCs) forMemory Termination Applications (DDR)PGOOD to Monitor Output RegulationEN Input REFIN Input Allows for Flexible Input Tracking Either Directly or Through ResistorDividerRemote Sensing (VOSNS)±10-mA Buffered Reference (REFOUT)Built-in Soft Start, UVLO, and OCLThermal ShutdownSupports DDR, DDR2, DDR3, DDR3L, Low-Power DDR3, and DDR4 VTTApplications 10-Pin VSON Package With Thermal PadAll trademarks are the property of their respective owners.

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    TPS51200DRCRTI具有用于 DDR2、DDR3、DDR3L 和 DDR4 的 VTTREF 缓冲基准的 3A 灌电流/拉电流 DDR 终端稳压器 立即购买
    TPS51200DRCRG4TIIC CONV DDR DDR2 DDR3 10SON 立即购买
    TPS51200DRCTG4TIIC CONV DDR DDR2 DDR3 10SON 立即购买
    TPS51200DRCTTIDDR电源 VSON10_3X3MM_EP Iin=0.7mA 立即购买

    技术资料

    标题类型大小(KB)下载
    简化的 LDO PSRR 测量PDF1884 点击下载
    LDO PSRR Measurement SimplifiedPDF131 点击下载
    LDO Noise DemystifiedPDF785 点击下载
    Intel VR11.1 Server Reference DesignPDF38 点击下载
    Power Ref Design for TMS320C6472, 12-Vin Digital Pwr Cntrlrs, and LDOsPDF559 点击下载
    12Vin design using Digital Power Controllers and LDOs (8x C6472) PDF558 点击下载
    Power two Xilinx 6 LX240 Virtex 6 devicesPDF63 点击下载
    5V input power design, Integrated FET DCDC Converters (1x C6472) PDF251 点击下载

    应用案例更多案例

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