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    首页产品索引NB100LVEP17

    NB100LVEP17

    购买收藏
     Quad Differential Driver/Receiver/Buffer

    制造商:ON

    产品信息

    The NB100LVEP17 is a 4-bit differential line receiver.The design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.
    The V
    pin, an internally generated voltage supply, is available to this device only.For single-ended input conditions, the unused differential input is connected to V
    as switching reference voltage.V
    may also rebias AC coupled inputs.When used, decouple V
    and V
    via a 0.01 uF capacitor and limit current sourcing or sinking to 0.5 mA.When not used, V
    should be left open.
    Inputs of unused gates can be left open and will not affect the operation of the rest of the device.
    • 250 ps Typical Propagation Delay
    • Maximum Frequency >2.5 GHz Typical
    • Flow through Pinout
    • PECL Mode Operating Range:V
    • = 2.375 V to 3.8 V, with V
    • = 0 V
    • NECL Mode Operating Range:V
    • = 0 V, with V
    • = -2.375 V to -3.8 V
    • Q Output will Default LOW with Inputs Open or at V
    • V
    • Output

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    NB100LVEP17MNGONIC DRVR ECL QUAD 2.5V/3.3V 24QFN 立即购买
    NB100LVEP17MNR2GONIC DRVR ECL QUAD 2.5V/3.3V 24QFN 立即购买
    NB100LVEP17DTR2GONDifferential Receiver/Driver IC 20-TSSOP 立即购买
    NB100LVEP17DTGONIC DRV/RCV ECL QUAD DIFF 20TSSOP 立即购买

    技术资料

    标题类型大小(KB)下载
    IBIS Model for nb100lvep17dt 3.3VUNKNOW9 点击下载
    IBIS Model for nb100lvep17dt 2.5VUNKNOW9 点击下载
    2.5V / 3.3V ECL Quad Differential Driver/ReceiverPDF99 点击下载
    TSSOP-20 WBPDF38 点击下载
    QFN24, 4x4, 0.5PPDF58 点击下载
    NB100LVEP17_PKG.GIFUNKNOW14 点击下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载

    应用案例更多案例

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