Microchip’s dsPIC33E family of digital signal controllers (DSCs) features a 70 MIPS dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation, have a great range and extended life. They can be used to control brushless DC, permanent magnet synchronous, AC induction and stepper motors. These devices are also ideal for high-performance general purpose applications.
Operating Conditions3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
dsPIC33E DSC CoreModified Harvard Architecture
C Compiler Optimized Instruction Set
16-bit Wide Data Path
24-bit Wide Instructions
16x16 Integer Multiply Operations
32/16 and 16/16 Integer Divide Operations
Two 40-bit Accumulators with Rounding and Saturation Options
Single-Cycle Multiply and Accumulate
Single-Cycle shifts for up to 40-bit Data
16x16 Fractional Multiply/Divide Operations
High-Speed PWMUp to three PWM pairs with independent timing
Dead time for rising and falling edges
7.14 ns PWM resolution
PWM support for:- Inverters, PFC, Lighting- BLDC, PMSM, ACIM, SRM
Programmable Fault inputs
Flexible trigger configurations for ADC conversions
Advanced Analog FeaturesADC module:- Configurable as 10-bit, 1.1 Msps with four S&H or12-bit, 500 ksps with one S&H
Up to three Op amp/Comparators:- Op Amp direct connection to the ADC module- Additional dedicated comparator- Programmable references with 32 voltage points for comparators
Charge Time Measurement Unit (CTMU):- Supports mTouch™ capacitive touch sensing
Timers/Output Compare/Input Capture12 general purpose timers:- Five 16-bit and up to two 32-bit timers/counters- Four OC modules configurable as timers/counters- PTG module with two configurable timers/counters- 32-bit Quadrature Encoder Interface (QEI) module configurable as a timer/counter
Four IC modules
Peripheral Trigger Generator (PTG) for scheduling complex sequences
Communication InterfacesTwo UART modules (15 Mbps)
Two 4-wire SPI modules (15 Mbps)
Two I2C™ modules (up to 1 Mbaud) with SMBus support
ECAN™ module (1 Mbaud) CAN 2.0B support
PPS to allow function remap
Programmable Cyclic Redundancy Check (CRC)
Direct Memory Access (DMA)4-channel DMA with user-selectable priority arbitration
UART, SPI, ECAN, ADC, IC, OC, and Timers
DSPIC33EP32MC502 封装图
DSPIC33EP32MC502 封装图
DSPIC33EP32MC502 封装图
DSPIC33EP32MC502 封装图
DSPIC33EP32MC502 封装图
DSPIC33EP32MC502 封装图
DSPIC33EP32MC502 封装图
DSPIC33EP32MC502 封装图
型号 | 制造商 | 描述 | 购买 |
---|---|---|---|
DSPIC33EP32MC502-I/MM | Lattice | IC FPGA 500 I/O 672FPBGA | 立即购买 |
DSPIC33EP32MC502T-E/SO | Microchip | IC MCU 16BIT 32KB FLASH 44TQFP | 立即购买 |
DSPIC33EP32MC502T-E/SS | Microchip | IC MCU 8BIT 32KB FLASH 28SPDIP | 立即购买 |
DSPIC33EP32MC502T-E/MM | Microchip | IC MCU 16BIT 64KB FLASH 64TQFP | 立即购买 |
DSPIC33EP32MC502-E/MM | - | - | 立即购买 |
DSPIC33EP32MC502-E/SP | - | - | 立即购买 |
70 MIPS dsPIC33EP256将单周期 MAC 与双数据提取相结合;两个 40 位宽的累加器;单周期、混合符号 MUL 加硬件除法;32位乘法支持;15个DMA通道;以及多达 7 个具有独立时序和 8.2 ns 分辨率的 PWM 对。
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