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    首页产品索引PIC24FJ256GB406

    PIC24FJ256GB406

    购买收藏
    16 MIPS, 256KB Flash, 16KB RAM, 64 pins, XLP, Security, LCD, USB

     

    产品信息

    PIC24F 16-bit Microcontroller featuring integrated Hardware Crypto module and eXtreme Low Power. This family also includes 256KB Flash, 16KB RAM, USB, LCD and advanced peripherals. The combination of features makes the part ideally suited for low power embedded security applications.

    Cryptographic Engine

      Performs NIST Standard Encryption/Decryption Operations without CPU Intervention

      AES Cipher Support for 128, 192 and 256-Bit Keys

      DES/3DES Cipher Support, with up to Three Unique Keys for 3DES

      Supports ECB, CBC, OFB, CTR and CFB128 modes

      Programmatically Secure OTP Array for Key Storage

      True Random Number Generation

      Battery-Backed RAM Key Storage

    Extreme Low-Power

      Multiple Power Management Options for Extreme Power Reduction:

      VBAT allows for lowest power consumption on backup battery (with or without RTCC)

      Deep Sleep allows near total power-down with the ability to wake-up on external triggers

      Sleep and Idle modes selectively shut down peripherals and/or core for substantial power reduction and fast wake-up

      Doze mode allows CPU to run at a lower clock speed than peripherals

      Alternate Clock modes allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction

      Extreme Low-Power Current Consumption for Deep Sleep

      WDT: 650 nA @ 2V typical

      RTCC: 650 nA @ 32 kHz, 2V typical

      Deep Sleep current, 60 nA typical

      160 uA/MHz in Run mode

    CPU

      Modified Harvard Architecture

      Up to 16 MIPS Operation @ 32 MHz

      8 MHz Internal Oscillator:

      96 MHz PLL option

      Multiple clock divide options

      Run-time self-calibration capability for maintaining better than ±0.20% accuracy

      Fast start-up

      17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier

      32-Bit by 16-Bit Hardware Divider

      16 x 16-Bit Working Register Array

      C Compiler Optimized Instruction Set Architecture

      Two Address Generation Units for Separate Read and Write Addressing of Data Memory

    Analog Features

      10/12-Bit, up to 24-Channel Analog-to-Digital (A/D) Converter:

      Conversion rate of 500 ksps (10-bit), 200 kbps (12-bit)

      Auto-scan and threshold compare features

      Conversion available during Sleep

      One 10-Bit Digital-to-Analog Converter (DAC):

      1 Msps update rate

      Three Rail-to-Rail, Enhanced Analog Comparators with Programmable Input/Output Configuration

      Charge Time Measurement Unit (CTMU):

      Used for capacitive touch sensing, up to 24 channels

      Time measurement down to 100 ps resolution

    Dual Partition Flash with Live Update Capability

      Capable of Holding Two Independent Software Applications, including Bootloader

      Permits Simultaneous Programming of One Partition while Executing Application Code from the Other

      Allows Run-Time Switching Between Active Partitions

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    PIC24FJ256GB406-I/PTAmpheno lIndustrial 立即购买
    PIC24FJ256GB406-I/MRVishay Siliconix 立即购买

    应用案例更多案例

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