DescriptionThe OS81092 is a highly-integrated Intelligent Network Interface Controller (INIC) specifically designed for the 50 Mbps MOST® network (MOST50) with an electrical physical layer optimized for Unshielded Twisted Pair (UTP) copper wire. The integrated electrical physical layer (ePHY) signal conditioning circuitry offers differential I/O that interfaces to a passive ePHY transformer. This enables MOST data transmission via UTP cable.

The OS81092 is the cost-optimized version of OS81082.

Like all INIC circuits, the OS81092 implements time-critical, resource-intensive and fail-safe relevant parts of the network driver on-chip.

The INIC makes a MOST device accessible according to the rules of the MOST Specification, even without participation from the External Host Controller (EHC). The INIC provides a message-based interface for control and packet data. Configuration is encapsulated within a Function Block (FBlock INIC) which allows the EHC to manage INIC in the same way as other functions in the system.

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A few highlights

  Complete MOST network interface on a single chip

  Fully encapsulated

  Optimized for a 50 Mbps electrical physical layer (e.g., via UTP cable)

  Embedded MOST network management

  Network protected mode

  Hardware & application watchdog timer

  Intelligent muting

  Cost-optimized version of OS81082

  Replaces FLASH memory with ROM

  Utilizes a smaller process (0.18µm)

  Migrates to a cost-effective QFN package