MC14517B

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Dual 64-Bit Static Shift Register

制造商：ON

中文数据手册

产品信息

The MC14517B dual 64-bit static shift register consists of two identical, independent, 64-bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, regardless of the state of the write enable input. An output is disabled (open circuited) when the write enable input is high. During this time, data appearing at the data input as well as the 16-bit, 32-bit, and 48-bit taps may be entered into the device by application of a clock pulse. This feature permits the register to be loaded with 64 bits in 16 clock periods, and also permits bus logic to be used. This device is useful in time delay circuits, temporary memory storage circuits, and other serial shift register applications.

Diode Protection on All Inputs
Fully Static Operation
Output Transitions Occur on the Rising Edge of the Clock Pulse
Exceedingly Slow Input Transition Rates May Be Applied to the Clock Input
3-State Output at 64th-Bit Allows Use in Bus Logic Applications
Shift Registers of any Length may be Fully Loaded with 16 Clock Pulses
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
Pb-Free Packages are Available

电路图、引脚图和封装图

MC14517B电路图

在线购买

型号	制造商	描述	购买
NLV14517BDWR2G	ON	ICCOUNTERBINARYUP/DOWN16SOIC	立即购买
MC14517BDWR2G	ON	IC SHIFT REG DUAL 64BIT 16-SOIC	立即购买
MC14517BDWG	ON	IC SHIFT REGISTER 64BIT 16SOIC	立即购买

技术资料

标题	类型	大小（KB）	下载
Dual 64-Bit Static Shift Register	PDF	103	点击下载
SO-16 WB	PDF	55	点击下载
MC14517B_PKG.GIF	UNKNOW	12	点击下载

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