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    首页产品索引MC100LVELT22

    MC100LVELT22

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     Translator, Dual LVTTL / LVCMOS to Differential LVPECL

    制造商:ON

    产品信息

    The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which require the translation of a clock and a data signal.
    • 350ps Typical Propagation Delay
    • ESD Protection: >4 KV HBM, >200 V MM
    • Flow Through Pinouts
    • The 100 Series Contains Temperature Compensation
    • LVPECL Operating Range: V
    • = 3.15 V to 3.45 V with GND= 0 V
    • When Unused TTL Input is left Open, Q Output will Default High
    • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
    • Moisture Sensitivity Level 1
    • For Additional Information, see Application Note AND8003/D
    • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
    • Transistor Count = 164 devices
    • Pb-Free Packages are Available

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    MC100LVELT22DTRGONIC XLATOR DUAL DFF LVPECL 8TSSOP 立即购买
    MC100LVELT22DR2GONIC XLATOR DUAL DIFF LVPECL 8SOIC 立即购买
    MC100LVELT22DGONIC TRANSLATOR DUAL 3.3V 8SOIC 立即购买
    MC100LVELT22DTGONIC TRANSLATOR DUAL 3.3V 8TSSOP 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Designing with PECL (ECL at +5.0 V)PDF102 点击下载
    The ECL Translator GuidePDF142 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
    Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载
    Interfacing with ECLinPSPDF72 点击下载

    应用案例更多案例

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