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    首页产品索引MC100EP445

    MC100EP445

    购买收藏
     Serial to Parallel Converter, 3.3 V / 5 V, 8-bit ECL

    制造商:ON

    中文数据手册

    产品信息

    The MC10/100EP445 is an integrated 8-bit differential serial to parallel data converter with frame asynchronous data resynchronization. The device is designed to operate for NRZ data rates of up to 5.0 Gb/s. The conversion sequence was chosen to convert the first serial bit to Q0, the second bit to Q1, etc. Two selectable differential serial inputs, which are selected by SINSEL, provide this device with loop-back testing capability. The MC10/100EP445 has a Sync pin which, when held high for at least two consecutive clock cycles, will swallow one bit of data shifting the start of the conversion data from D
    to D
    . Each additional shift requires an additional pulse to be applied to the Sync pin.
    Extra control pins are provided to reset and disable internal clock circuitry. Additionally, V
    pin is provided for single-ended input condition.
    The 100 Series contains temperature compensation.
    • 1530 ps Propagation Delay
    • 5.0 Gb/s Data Rate Capability
    • Differential Clock and Serial Inputs
    • V
    • Output for Single-Ended Input Applications
    • Asynchronous Data Synchronization (SYNC)
    • Asynchronous Master Reset (RESET)
    • PECL Mode Operating Range: V
    • = 3.0 V to 5.5 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0 V with V
    • =-3.0 V to -5.5 V
    • Open Input Default State
    • CLK ENABLE Immune to Runt Pulse Generation
    • Pb-Free Packages are Available

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    MC100EP445FAGONSERIAL IN PARALLEL OUT, 100E SER 立即购买
    MC100EP445MNGONIC CONV SER/PAR 8BIT ECL 32-QFN 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Interfacing Between LVDS and ECLPDF121 点击下载
    Designing with PECL (ECL at +5.0 V)PDF102 点击下载
    The ECL Translator GuidePDF142 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
    Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载

    应用案例更多案例

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