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    首页产品索引MC100EP195B

    MC100EP195B

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     3.3 V ECL Programmable Delay Chip

    制造商:ON

    产品信息

    The MC100EP195B is a Programmable Delay Chip (PDC) designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. Thedelay section consists of a programmable matrix of gates and multiplexers as shown in the logic diagram, Figure 2. The delay increment of the EP195B has a digitally selectable resolution of about 10 ps and a net range of up to 10.2 ns. The required delay is selected by the 10 data select inputs D(9:0) values and controlled by the LEN (pin 10). A LOW level on LEN allows a transparent LOAD mode of real time delay values by D(9:0). A LOW to HIGH transition on LEN will LOCK and HOLD currentvalues present against any subsequent changes in D(10:0). The approximate delay values for varying tap numbers correlating to D0 (LSB) through D9 (MSB) are shown in Table 6 and Figure 3.
    • Maximum Input Clock Frequency >1.2 GHz Typical
    • Programmable Range: 0 ns to 10 ns
    • Delay Range: 2.2 ns to 12.2 ns
    • 10 ps Increments
    • PECL Mode Operating Range:VCC = 3.0 V to 3.6 V with VEE = 0 V
    • NECL Mode Operating Range:VCC = 0 V with VEE = 3.0 V to 3.6 V
    • IN/INb Inputs Accept LVPECL, LVNECL, LVDS Levels
    • A Logic High on the EN Pin Will Force Q to Logic Low
    • D10:0 Can Select Either LVPECL, LVCMOS, or LVTTL Input Levels
    • VBB Output Reference Voltage

    在线购买

    型号制造商描述购买
    MC100EP195BFAR2GONIC DELAY LN 1024TAP PROG 32LQFP 立即购买
    MC100EP195BMNR4GONIC DELAY LINE 1024TAP PROG 32QFN 立即购买
    MC100EP195BMNGONIC DELAY LINE 1024TAP PROG 32QFN 立即购买
    MC100EP195BFAGONIC DELAY LN 1024TAP PROG 32LQFP 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Interfacing Between LVDS and ECLPDF121 点击下载
    Designing with PECL (ECL at +5.0 V)PDF102 点击下载
    The ECL Translator GuidePDF142 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
    Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载

    应用案例更多案例

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