The HV574 is a low-voltage serial to high-voltage parallel con-verter with push-pull outputs. This device has been designed for use as a driver for printer applications. It can also be used in any application requiring multiple output high-voltage current sour-cing and sinking capability such as driving plasma panels, vacuum fluorescent displays, or large matrix LCD displays.The device has 4 parallel 20-bit dynamic shift registers, permitting data rates 4X the speed of one (they are clocked together). There are 80 static latches and control logic to perform the polarity select and blanking of the outputs. HVOUT1 is connected to the first stage of the first shift register through the polarity and blanking logic. Data is shifted through the shift registers on the logic low to high transition of the clock. The DIR pin causes CCW shifting when connected to GND, and CW shifting when connected to VDD. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (HVOUT80). Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL (polarity) inputs. Transfer of data from the shift registers to the latches occurs when the LE (latch enable) input is high. The data in the latches is stored when LE is low.
HVCMOS® technology
5.0V CMS Logic
Output voltage up to 80V
Low power level shifting
100MHz equivalent data rate using four dynamic shift registers
Latched data outputs
Foreward and reverse shifting options (DIR pin)
Diode to VPP allows efficient power recovery
Outputs may be hot switched
HV574 封装图
型号 | 制造商 | 描述 | 购买 |
---|---|---|---|
HV574PG-G | SiTime | 有源晶振 SMD7050_4P | 立即购买 |
本文首先介绍了74ls574特点及引脚图,其次介绍了74ls574功能表及内部框图,最后介绍了74ls574推荐工作条件及电气性能和封装。
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AD574A引脚图及应用电路图 AD
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本文主要介绍了基于AD574模数转换的数据处理程序设计。通过AD574与单片机的接口电路设计以及AD574和单片机的接口数据处理程序的编程设计,在模拟信号的数据采集中发挥了优势。
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