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    首页产品索引MC74AC377

    MC74AC377

    购买收藏
     Octal D Flip-Flop with Clock Enable

    制造商:ON

    中文数据手册

    产品信息

    The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops withindividual D inputs and Q outputs. The common buffered Clock (CP) input loadsall flip-flops simultaneously, when the Clock Enable (CE) is LOW.
    The register is fully edge-triggered. The state of each D input, one setup timebefore the LOW-to-HIGH clock transition, is transferred to the corresponding flipflop's Q output. The CE input must be stable only one setup time prior to theLOW-to-HIGH clock transition for predictable operation.
    • Ideal for Addressable Register Applications
    • Clock Enable for Address and Data Synchronization Applications
    • Eight Edge-Triggered D Flip-Flops
    • Buffered Common Clock
    • Outputs Source/Sink 24 mA
    • See MC74AC273 for Master Reset Version
    • See MC74AC373 for Transparent Latch Version
    • See MC74AC374 for 3-State Version
    • ACT377 Has TTL Compatible Inputs
    • Pb-Free Packages are Available

    在线购买

    型号制造商描述购买
    MC74AC377DWGONIC FF D-TYPE SNGL 8BIT 20SOIC 立即购买
    MC74AC377DWR2GONIC FF D-TYPE SNGL 8BIT 20SOIC 立即购买
    MC74AC377DTGONIC FF D-TYPE SNGL 8BIT 20TSSOP 立即购买
    MC74AC377DTR2GONIC FF D-TYPE SNGL 8BIT 20TSSOP 立即购买

    技术资料

    标题类型大小(KB)下载
    Octal D Flip Flop with Clock EnablePDF96 点击下载
    IBIS Model for MC74AC377DWUNKNOW9 点击下载
    IBIS Model for MC74AC377_33DWUNKNOW9 点击下载
    TSSOP-20 WBPDF38 点击下载
    SOIC-20 WBPDF35 点击下载

    应用案例更多案例

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