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    首页产品索引MC10ELT25

    MC10ELT25

    购买收藏
     Translator, Differential ECL to TTL

    制造商:ON

    中文数据手册

    产品信息

    The MC10ELT/100ELT25 is a differential ECL to TTL translator. Because ECL levels are used, a +5 V, -5.2 V (or -4.5 V) and ground are required. The small outline 8-lead package and the single gate of the ELT25 makes it ideal for those applications where space, performance and low power are at a premium.
    The V
    pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V
    as a switching reference voltage. V
    may also rebias AC coupled inputs. When used, decouple V
    and V
    via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V
    should be left open.
    The 100 Series contains temperature compensation.
    • 2.6ns Typical Propagation Delay
    • 100 MHz F
    • CLK
    • 24 mA TTL Outputs
    • Flow Through Pinouts
    • ESD Protection: >1 KV HBM, > 400 V MM
    • Operating Range: V
    • = 4.5 V to 5.5 V with GND= 0 V; V
    • = -4.2 V to -5.7 V with GND= 0 V
    • Internal Input Pulldown Resistors
    • Q Output will default HIGH with inputs open or
    • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
    • Moisture Sensitivity Level 1
    • For Additional Information, see Application Note
    • AND8003/D
    • Flammability Rating: UL-94 code V-0 @ 1/8",
    • Oxygen Index 28 to 34
    • Transistor Count = 38 devices
    • Pb-Free Packages are Available

    电路图、引脚图和封装图

    在线购买

    型号制造商描述购买
    MC10ELT25DR2GONMixed Signal Translator Unidirectional 1 Circuit 1 Channel 8-SOIC 立即购买
    MC10ELT25DTGONMixed Signal Translator Unidirectional 1 Circuit 1 Channel 8-TSSOP 立即购买
    MC10ELT25DGONMixed Signal Translator Unidirectional 1 Circuit 1 Channel 8-SOIC 立即购买

    技术资料

    标题类型大小(KB)下载
    AC Characteristics of ECL DevicesPDF896 点击下载
    ECL Clock Distribution TechniquesPDF54 点击下载
    Interfacing Between LVDS and ECLPDF121 点击下载
    Designing with PECL (ECL at +5.0 V)PDF102 点击下载
    The ECL Translator GuidePDF142 点击下载
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 点击下载
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 点击下载
    Storage and Handling of Drypack Surface Mount DevicePDF49 点击下载

    应用案例更多案例

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